Test bench architecture, systemverilog minutae, polymorphism in uvm, fifo design(including the generation of control), details on clock domain crossing, clock gating, setup and hold times, flops and resets, serial protocol and clock recovery,cache coherency, power saving methods, assertions, soc verification techniques, data structures,sort and search algorithms, quantum mechanics(no.. just kidding about the last one)
cover each "gotcha" point on all of the topics(all of which I answered correctly), but few with real depth or understanding. I got the feeling that they knew stuff as solutions to puzzles . When asked about their "solutions" they gave weak plausibility examples.
Also, hashing algorithms and applications, as usual an eternal fad.
