I applied online. I interviewed at Meta (Santa Clara, CA) in Apr 2025
Interview
The interviewer asked for an introduction and in 5 minutes I was asked to code UVM sequence, sequencer and driver for a 32 bit RAM, when then 2 assertion questions and 2 constraint questions.
Interview questions [1]
Question 1
Constraint for 8-bit opcode (SystemVerilog)
➤ Only one bit can be set in the 8-bit opcode (i.e., one-hot encoding).
Matrix size based on opcode bit index
➤ Based on which bit is set in the 8-bit opcode, generate a square 2D array (e.g., if bit 4 is set, matrix is 4x4).