Apple interview question
Design a Cache, 32KB, 40 bit address, 64 Byte cache line, 4 way associative. How many bits are required to implement true LRU?
Interview Answer
Anonymous
30 Nov 2017
5 bits, but in reality, that is not a good idea...
Design a Cache, 32KB, 40 bit address, 64 Byte cache line, 4 way associative. How many bits are required to implement true LRU?
Anonymous
5 bits, but in reality, that is not a good idea...
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