5.0
3 Oct 2025
Current employee, more than 3 years
San Jose, CA
Recommend
CEO approval
Business outlook
Pros
Strong exposure to industry-grade UVM-based testbenches and SystemVerilog assertions Supportive team with experienced mentors, especially for early-career engineers Excellent collaboration between design and verification teams Access to cutting-edge SoC and PHY design flows Competitive salary, great healthcare, and flexible WFH options
Cons
Onboarding can feel overwhelming due to complex verification environments Some legacy test infrastructure still in use alongside newer flows Cross-site communication with international teams can cause delays