Intel Corporation interview question
Write the Verilog code for a D-Flip Flop.
Interview Answer
Anonymous
20 Jul 2015
wire d, clk; reg q; always @(posedge clk) q <= d;
1
Write the Verilog code for a D-Flip Flop.
Anonymous
wire d, clk; reg q; always @(posedge clk) q <= d;
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