Project details explanation Uvm flow questions Implementation of the uvm driver code for given scenarios. Coding of tlm fifo for given scenario System verilog questions Assertions related questions Apptitide and some logical questions. Two levels of interview .
I applied in-person. I interviewed at SeviTech Systems (Bengaluru) in Jul 2017
Interview
It was three round interview process ,two taken by the technical panel, and after two technical discussions one Manager round taken by the manager . CEO 's round is optional for Specific domains , Clients interview's are also additional once if are shortlisted for the specific clients.
Interview questions [1]
Question 1
Questions were mostly related to Programming languages like verilog and system verilog and Projects which have been worked .