First interview is a phone interview with HR. HR asks both technical and behavioral questions. I was asked to design a flip flop in vhdl, synthesis questions related to FPGA, multiple driver problem in FPGA code. I was given a DC circuit with couple of resistors hooked up and asked to calculate the current through one of the resistors, power dissipated from the resistor. At the end of the interview, I was given a problem and asked to write a vhdl code in 30 min and mail it back to them. The problem was finding the number of 1 in a 100 bit sequence. After the first round, I was called for another phone interview with manager and group of people. This lasted for almost an hour and I was asked a lot of digital and analog questions. I did well in digital questions but was not so good at analog. Questions were related to difference between CISC and RISC, types of memory, difference between fpga and cpld, synchronizer using d flip flops, constraint on it, what is the resolution of ADC if the input is -3.3 to 3.3v range and it is a 16 bit adc, sampling theorem questions, aliasing, bypass capacitor function - y is it called bypass capacitor etc. Luckily I got selected for the onsite interview and this consisted of a 30 min factory tour initially followed by a presentation of the previous work topic for 1.30 hours, technical questions for about 30 min , Lunch for an hour, then 2 hour technical questions on the white board. I was asked to design a synchronizer circuit with an edge detector, state machine for the clock divider circuit and deriving an equation for the output frequency - all went well here,LED problem analysis in analog design which I didn't do well.