I interviewed at Microchip Technology (San Jose, CA) in May 2024
Interview
4 technical rounds
FPGA architecture
Digital Logic
Static Timing Analysis
C++
Python
Deep dive into past work experience and projects
Each round was a detailed and extensive deep dive into the above topics
Interview questions [1]
Question 1
1. A CMOS implementation of XOR gate using minumum number of NAND gates
I interviewed at Microchip Technology (Santa Clara, CA)
Interview
Four interviews, some in person some online. Each interview is with a member of the team you will be working on. All interviews were very technical and test the limits of your knowledge.
Interview questions [1]
Question 1
The interviewer asked me to implement a graph in C++.
The process included an initial recruiter screening followed by a longer virtual technical interview with the hiring team. The interview covered my background, project experience, C++/algorithms/data structures, scripting experience, and some FPGA/EDA-related concepts such as timing analysis and debugging. Overall, the process was professional and focused on both software fundamentals and domain knowledge.
Interview questions [1]
Question 1
One question they asked was how I would approach parsing a large Verilog netlist and identifying module instantiations efficiently.
I applied online. I interviewed at Microchip Technology (Chennai)
Interview
Applied for low-level driver developer role through company web site
Round 1 includes 60–100 questions on C bug-finding, electronics, networking, RTOS, microcontrollers, number conversions, minimal aptitude, and 3 coding problems focused on string manipulation and bit masking.
Interview questions [1]
Question 1
Round 1: Written Test
Topics Covered:
Bug-finding in C programs
Electronics
Networking
RTOS
Microcontrollers
Number conversions(binary,decimal and bit masking)
A few general aptitude questions (e.g., time, percentage) – but aptitude is minimal, so focus mainly on technical topics
Programming Section:
3 coding questions
Topics include: string manipulation and bit masking
This for low-level driver developer role
