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      Marvell Technology

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      Related searches: Marvell Technology reviews | Marvell Technology jobs | Marvell Technology salaries | Marvell Technology benefits
      Marvell Technology interviewsMarvell Technology Logic Design Engineer interviewsMarvell Technology interview


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      Logic Design Engineer Interview

      24 Sept 2015
      Anonymous interview candidate
      No offer
      Positive experience

      Other Logic Design Engineer interview reviews for Marvell Technology

      Logic Design Engineer Interview

      10 Mar 2016
      Anonymous employee
      San Jose, CA
      Accepted offer
      Average interview

      Application

      I interviewed at Marvell Technology

      Interview

      I got a phone interview the other day directly from a current employee from their CPU group. He asked me about the basic concepts in computer architecture and it was not very hard. Also, he asked a lot about work experiences showed on my resume.

      Interview questions [1]

      Question 1

      basic cache related questions
      Answer question
      Positive experience
      Average interview

      Application

      I applied through university. The process took 3 weeks. I interviewed at Marvell Technology (San Jose, CA) in Feb 2016

      Interview

      My resume was referred to CPU group through an alumni from umich. Around 1 months after I submitted my resume, I got an email from the hiring manager. He asked me what was the good day for the phone interview. The phone interview took half an hour. One logic engineer asked me some basic questions about 5 stage in order pipeline and something about my resume. After 2 weeks came the invitation for onsite interviewIt. It took half day for meeting 5 people. Each interviewer spent ~ 30 minutes and asked ~ 5 questions. Each interviewer asked questions in the different areas.

      Interview questions [2]

      Question 1

      Do we need PC to index second level table of branch predictor (i.e. pattern history table)? Why? What if bits of PC more than bits to index to pattern history table?
      1 Answer

      Question 2

      How can we use PRF to implement CMOV instruction?
      1 Answer
      2

      Logic Design Engineer Interview

      4 Sept 2014
      Anonymous employee
      Accepted offer
      Positive experience
      Average interview

      Application

      I applied online. I interviewed at Marvell Technology

      Interview

      Heard about job openings through a friend that was contacted by a recruiter. E-mailed my resume to the recruiter and was invited for short on-site interviews with two different teams: CPU logic design and SoC verification. I was only brought on-site for the first step because I was living in Santa Clara at the time. After the two interviews, I was later invited back for a full day of on-site interviews with the CPU team. I interviewed with 5 different members of the CPU team. I thought I did really well with the interviews but it still took Marvell weeks to get back to me with an official offer.

      Interview questions [1]

      Question 1

      Questions were related to logic design and computer architecture. With a good understanding of pipeline design and out-of-order execution principles the questions were not too hard. The only question that I couldn't really solve was about the design of a scalable, fair arbiter. Expect questions about out-of-order execution algorithms, state machine design, and logic optimization.
      Answer question
      1