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      Cadence Design Systems

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      Rtl Design Engineer Interview

      22 Feb 2023
      Anonymous interview candidate
      No offer
      Positive experience
      Average interview

      Application

      I applied through other source. I interviewed at Cadence Design Systems in Feb 2023

      Interview

      Two techincal round were supposed to be taken for the interview process. Unfortunately I didn't make to the first round itself. first round of interview was online. Second round was offline.

      Interview questions [1]

      Question 1

      Q1: What is CDC. Q2: Explain setup time and hold time. Q3: Some waveforms and we have to state whether the output is correct or not. Q4: Conversion Gray to binary. Q5: Equality and inequality operators(logical and case operator) Q6:What is FPGA? Expalin.
      Answer question

      Other Rtl Design Engineer interview reviews for Cadence Design Systems

      Rtl Design Engineer Interview

      28 May 2025
      Anonymous interview candidate
      No offer
      Positive experience
      Difficult interview

      Application

      I interviewed at Cadence Design Systems

      Interview

      Recruiter short listing followed by an online interview. Questions based clock domain crossing, reset domain crossing, asynchronous FIFO etc. Interviewer was very helpful throughout the interview discussion. Overall it was good experience and got to learn a lot

      Interview questions [1]

      Question 1

      Reset synchroniser Flip flop based synchroniser
      Answer question

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