basic and conceptual SV constraint and assertion questions. verilog code of digital circuits along with testbench code. uvm_scoreboard code templates. APB FSM diagram explanation. prime no constraint code and digital circuits using muxes.

It was good, very social and very supportive. They actually tell the result very soon and schedule the next round according to your convenience. After every round they tell where we are lacking and how to answer the questions in a correct way.