Qualcomm ASIC Layout Design Engineer jobs
25 results in New-Zealand
- 30d+
- 30d+
- 11d
- 30d+
- 30d+
- 10d
- 10d
- 30d+
- 30d+
- 12d
- 12d
- 7d
- HW SOC/ASIC Physical Design Engineer, Senior (US Citizenship Required)San Diego, CAUS$116K - US$173K (Employer provided)30d+
- HW SOC/ASIC Physical Design Engineer, Staff/Sr Staff (US Citizenship Required)San Diego, CAUS$140K - US$210K (Employer provided)30d+
- 12d
- Sr Radio Frequency Integrated Circuit (RFIC) Design EngineerSan Diego, CAUS$127K - US$191K (Employer provided)30d+
- Analog Mixed Signal/Power Management Design EngineerSan Diego, CAUS$142K - US$214K (Employer provided)30d+
- High-Speed Analog & Mixed-Signal PHY Design EngineerSan Diego, CAUS$164K - US$246K (Employer provided)6d
- High-Speed Analog & Mixed-Signal PHY Design EngineerSan Diego, CAUS$164K - US$246K (Employer provided)26d
- 7d
- Microprocessor Silicon Validation and Optimization Engineer-StaffAustin, TXUS$140K - US$210K (Employer provided)4d
- 30d+
- Principal Engineer - Low Power Chip Architect / System EngineerSan Diego, CAUS$192K - US$288K (Employer provided)30d+
- 30d+
- 30d+